1. Field of the Invention
The present invention relates to a thyristor which serves as a switch by applying a specified voltage to a plurality of insulating gates and to a method of manufacturing the same.
2. Description of the Prior Art
FIG. 1 is a sectional view showing a conventional MCT (MOS Controlled Thyristor). In FIG. 1, a p.sup.+ substrate 1 has an n epitaxial layer 2A formed on one of its major surfaces, and an n.sup.- epitaxial layer 2B is formed on the n epitaxial layer 2A. A p well region 3 is formed in a part of an upper portion of the n.sup.- epitaxial layer 2B by selectively diffusing p type impurity. An n.sup.+ diffused region 4 is formed at the center region in the surface of the p well region 3 by selectively diffusing n type impurity of high concentration, and an n diffused region 5 is formed contiguous to the n.sup.+ diffused region 4 by diffusing n type impurity in the outer peripheral portion of the n.sup.+ diffused region 4. A p.sup.+ diffused region 6 is formed in the surface region lying across the n.sup.+ diffused region 4 and the n diffused region 5 by selectively diffusing p type impurity of high concentration around the boundary portion of the surface of the n.sup.+ diffused region 4 and the n diffused region 5.
A gate oxide film 7 is formed lying over the n.sup.- epitaxial layer 2B, the p well region 3, the n diffused region 5 and a part of the p.sup.+ diffused region 6, and a gate electrode 8 made of polysilicon is formed on the gate oxide film 7. Further, a cathode electrode 9 made of metal such as aluminum is provided on the n.sup.+ diffused region 4 and a part of the p.sup.+ diffused region 6 in contact with them, and the cathode electrode 9 and the gate electrode 8 are insulated from each other by a layer oxide film 10 provided therebetween. On the other hand, an anode electrode 11 made of metal is formed on the bottom surface of the p.sup.+ substrate 1.
FIG. 2 is a diagram showing an equivalent circuit of the MCT shown in FIG. 1. As shown in FIG. 2, the n.sup.+ epitaxial layer 2A and the n.sup.- epitaxial layer 2B (these two layers are generally referred to as "n base layer 2" hereinafter, as required), the p.sup.+ diffused region 3 and the n.sup.+ diffused region 4 compose an npn transistor T1, serving as a collector, a base and an emitter thereof, respectively. The p.sup.+ substrate 1, the n base layer 2 and the p.sup.+ diffused region 3 compose a pnp transistor T2, serving as an emitter, a base and a collector thereof, respectively. The n.sup.- epitaxial layer 2B, the p well region 3 and the n diffused region 5 compose an n MOS transistor Q1 where the gate electrode 8 serves as a gate and the surface of the p well region 3 between the n.sup.- epitaxial layer 2B and the n diffused region 5 serves as a channel region, respectively. The p well region 3, the n diffused region 5 and the p.sup.+ diffused region 6 compose a p MOS transistor Q2 where the gate electrode 8 serves as a gate and the surface of the n diffused region 5 serves as a channel region, respectively.
With the aforementioned constitution, as shown in a energy band diagram of FIG. 3, the MCT shown in FIG. 1 turns on by keeping the n MOS transistor Q1 turned on for a specified period of time with its anode 11 being higher in potential than its cathode 9. When positive voltage is applied to the gate electrode 8, the n MOS transistor Q1 turns on to inject electrons to the base of the transistor T2 through the channel formed close to the surface of the p well region 3 just under the gate electrode 8. Then, the transistor T2 turns on, and the amplification of the transistor causes a large amount of holes to flow across its collector. Since the collector of the transistor T2 is connected to a base of the transistor T1, the holes flow to the base of the transistor T1 to turn the transistor T1 on. The amplification of the transistor causes a large amount of electrons to flow to its collector. Since the collector of the transistor T1 is connected to the base of the transistor T2, the transistor T2 is increasingly turned on. Thus, once the n MOS transistor Q1 turns on, a positive feedback loop is formed between the transistors T1, T2. Hence, even when the n MOS transistor Q1 is turned off, current continuously flows between the transistors T1, T2 because of the thyristor operation obtained by the amplification of each of the transistors.
Meanwhile, the MCT turns off by turning the p MOS transistor Q2 on for a specified period of time. When negative voltage is applied to the gate electrode 8, the p MOS transistor Q2 turns on to cause holes to be injected to the base of the transistor T1 to flow through the channel formed in the surface of the n diffused region 5 just under the gate electrode 8 via the p.sup.+ diffused region 6 to the cathode electrode 9. As a result, the transistor T1 turns off, and then the transistor T2 turns off to stop the thyristor operation.
Thus, the MCT is turned on or off by applying positive voltage or negative voltage to the gate electrode 8 common to the MOS transistors Q1, Q2.
The conventional MCT has a constitution as stated above, and positive voltage or negative voltage is applied to the single gate electrode 8 to turn on or off either of the two MOS transistors Q1, Q2 so as to turn on or off the MCT.
However, since the two MOS transistors Q1, Q2 are formed in adjacent to each other, the p well region 3 serving as a channel of the n MOS transistor Q1 and the n diffused region 5 serving as a channel of the p MOS transistor Q2 are formed inevitably in adjacent to each other. The threshold voltage V.sub.th to turn the respective MOS transistors Q1, Q2 on is influenced by the impurity concentration, the width, etc. of each of the adjacent channel regions. Consequently, there arises the problem that it is difficult to set the individual threshold voltages V.sub.th of the MOS transistors Q1, Q2.
Although turning on of the n MOS transistor Q1 results in the MCT turning on, simultaneously electrons pass through the surface portion of the p well region 3 serving as the channel region of the n MOS transistor Q1 via the n diffused region 5 having low impurity concentration. On the other hand, although turning on of the p MOS transistor Q2 results in the MCT turning off, simultaneously holes pass through the surface portion of the n diffused region 5 serving as the channel region of the p MOS transistor Q2 via the p well region 3 having low impurity concentration. Thus, since electrons (holes) must pass through the region of relatively high resistance when the MCT is turned on or off, current density accordingly becomes small. Consequently, there arises the problem that the period of time of the MCT's turning on or off becomes longer than is necessary and the maximum current density to be turned off becomes small.
The p well region 3 in the surface of which the channel region of the n MOS transistor Q1 is formed has an unstable back gate voltage in the floating condition when the MCT is turned on. As a result, there arises the problem that the malfunction is easily caused due to the charge-up of the gate when the MCT works with high frequency.
Triple diffusion is necessary to the conventional MCT having a constitution as shown in FIG. 1. This causes the problem that the manufacturing process is complicated.